The present invention is related to a class-D amplifier.
Class-D amplifiers perform power amplification by pulse-width-modulating (PWM) input signals, and are utilized so as to perform power amplifications of audio signals. As conventional class-D amplifiers, there is such a class-D amplifier which is arranged by an integrator for integrating an analog input signal, a comparator for comparing an output signal of the integrator with a predetermined triangular wave, and a buffer (pulse amplifier) for amplifying an output signal of the comparator to output a pulse signal. In this conventional class-D amplifier, the pulse signal output from the buffer is fed back to the input side of the integrator. Then, the output signal of the buffer is filtered by a low-pass filter constructed of a coil and a capacitor so as to obtain an analog signal which drives a load such as a speaker.
As conventional pulse width modulating amplifiers, there is such a PWM amplifier which is arranged by a comparator for comparing an analog input signal with a triangular wave, an amplifier for amplifying an output of the comparator, and a transformer arranged between the amplifier and a load (refer to, for example, Japanese Patent Publication No. Sho-56-27001).
Further, as conventional digital amplifying circuits using digital signal processing circuits, there is such a digital amplifying circuit equipped with a noise shaper, a converter, a logic circuit, a switch, and a filter (refer to, for instance, Japanese Patent Disclosure No. 2000-500625) The noise shaper frequency-shapes a quantizing noise of a digital input signal. The converter converts a PCM (Pulse Code Modulation) signal corresponding to the output of the noise shaper into a PWM (Pulse Width Modulation) signal. The logic circuit compensates a linearity of the output signal of the converter. The switch is controlled by an output of the logic circuit. The input side of the filter is connected to a power supply by the switch.
However, in the above-explained conventional class-D amplifier, the buffer is constituted by two buffers, namely the plus-sided buffer and the minus-sided buffer. Even when an input signal is not present, these two buffers output the signals having the opposite polarities, the duty ratio of which is 50%. As a result, in the conventional class-D amplifier, even in such a case that the input signal is not present, the current may flow through the low-pass filter, which cause the large loss.
In Japanese Patent Publication No. Sho-56-27001, the technical idea for turning OFF the output amplifying element during no input signal is described in order to avoid the power loss when the input signal is not present. However, the conventional pulse width modulating amplifier described in the above-explained patent publication 1 owns such a problem that the transformer is required so as to convert the impedance and to cut off the DC voltage, which may conduct the large-scaled apparatus and the increase in cost thereof. Furthermore, the conventional pulse width modulating amplifier described in Japanese Patent Publication No. Sho-56-27001 has another problem that since the comparator compares the simple triangular wave with the input signal, the distortion of the output signal is large.
On the other hand, the digital amplifying circuit described in Japanese Patent Disclosure No. 2000-500625 uses the output statuses of either the three values or the four values (switching statuses), and amplifies the digital input signal, while such a digital circuit as the logic circuit is employed so as to improve the linearity. As a consequence, the digital amplifying circuit described in Japanese Patent Disclosure No. 2000-500625 owns a problem that since this digital amplifying circuit cannot be arranged by employing the analog circuit, the analog input signal cannot be amplified while maintaining the better linearity. In other words, in this conventional digital amplifying circuit, when the small signal pulse is input, since the compensation pulse is added to this small signal pulse, the output switch distortion in the logic circuit is compensated. However, this circuit for compensating the output switch distortion is constituted by employing only such a digital circuit as the logic circuit, so that the conventional digital amplifying circuit cannot amplify the analog input signal under better linearity condition.